Evolution of NULL Convention Logic Based Asynchronous Paradigm: An Overview and Outlook

The synchronous design paradigm dominates today’s semiconductor industry. However, this clocked approach is facing major challenges with high-speed, low-power expectations, using processes ever-increasing physical level variability. Several clock related issues surface in designs operating at higher frequencies, which make management increasingly difficult. Quasi-delay insensitive (QDI) asynchronous (clockless) have proved to be effective circumventing the limiting factors associated designs. NULL Convention Logic (NCL) one such QDI paradigm, presents itself as a promising alternative conventional circuits and has already found numerous commercial applications due its low power, robust architecture, ease of reuse. This paper evolution NCL based over past two decades, primarily focusing on existing fundamental research automation, spanning synthesis, optimization, testing, verification. methods are systematically analyzed determine their limitations future directions.